Senior FPGA/ASIC Digital Design Engineer

Vedi l’offerta su Go Lavoro: golavoro.it/annuncio-lavoro/781w9w

pExperteer Italy seeks a senior FPGA/ASIC design engineer to drive digital design for FPGA-based prototypes and ASIC readiness. You will translate RTL into silicon, shape architectures, verify complex blocks, and ensure timing, area, and power targets across the product lifecycle. /ppYou will interact with customers and stakeholders to align on functionality and protocols. The role requires deep knowledge of FPGA development flow, Verilog/SystemVerilog RTL, AXI/AHB interfaces, and experience with /p #J-18808-Ljbffr

Vedi l’offerta su Go Lavoro: golavoro.it/annuncio-lavoro/781w9w