Staff engineer, design verification

Vedi l’offerta su Go Lavoro: golavoro.it/annuncio-lavoro/78d6go

Overview Experteer Overview In this role you will verify complex mixed/digital ICs for data center power conversion, using cutting-edge methodologies. You will own verification of sub-systems and collaborate with cross-functional teams to meet verification goals. You'll mentor junior engineers and drive improvements in verification flow. This is a chance to shape high-performance chips used in data centers and digital infrastructure. Benefits Verify sub-systems using advanced verification methodologies Develop verification plans and environments from scratch across multiple projects Verify blocks with System Verilog and UVM Create and use scoreboard assertions, functional coverage, and formal verification Own complex feature verification and mentor junior engineers Improve verification flow and methodology Gate-level simulations and sub-system level debugging Responsibilities Bachelors or Masters in Electronics Engineering with 8+ years in digital design, including 3+ years in digital verification Expertise in Verilog, System Verilog, UVM, OO programming, scripting (Perl or Python)



Strong understanding of constrained random verification, coverage, and assertions Experience developing test plans and building verification environments from scratch Extensive experience verifying complex blocks, regressions, and coverage closure Gate-level simulation and debugging experience Excellent debugging, analytical, and problem-solving skills Strong interpersonal, teamwork, and communication skills Independent, proactive, and results-oriented Qualifications 8+ years in digital design with 3+ years in digital verification Proficiency in Verilog, System Verilog, UVM, OO programming, and scripting (Perl or Python) Experience with constrained random verification, coverage analysis, and assertions Ability to develop test plans and verification environments from scratch Experience with block verification, regressions, and coverage closure Gate-level simulation and debugging experience

Vedi l’offerta su Go Lavoro: golavoro.it/annuncio-lavoro/78d6go