Principal Verification Engineer
Pubblicato il 31-07-2026 - Altro in Bardi
Experteer Overview As a Principal Verification Engineer in onsemi's Power Management Division, you will strengthen block-level and SoC-level verification for power ICs. You will translate specifications into robust verification plans, driving high functional and code coverage. You will collaborate with a globally distributed team to shape verification strategy and ensure reliable, scalable designs. This role offers the opportunity to influence critical power management technology and verification methodologies at scale.
Retribuzione / Benefits Verify block-level and SoC-level designs for power management ICs
Extract design intent from specifications and develop verification strategies and plans
Achieve high functional and code coverage through coverage-driven verification
Collaborate in a globally distributed, cross-functional team to ensure quality and reliability
Responsabilità SystemVerilog
UVM
formal verification
verification methodologies
coverage-driven verification
hands-on verification experience
experience with block-level and SoC-level verification
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