Lead Digital Verification Architect for SoCs/ASIC

02 ago - Pavia
Infineon Technologies

Infineon Technologies AG is seeking a Principal Engineer in Functional Digital Design Verification to lead the verification of complex digital and mixed-signal designs, including IPs, subsystems, ASICs and SoCs. You will coordinate planning, tracking, and reporting, and collaborate across teams to ensure verification quality.

You will actively contribute hands-on verification, drive improvements, and mentor junior engineers to advance verification methodologies and efficiency across multi-site

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