Senior/Staff Engineer - Logical Design

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About UsAxelera AI is a deep?tech startup building the next?generation AI platform to aid humanity and improve the world. Si candidi (facendo clic sul pulsante apposito) dopo aver controllato tutte le informazioni di lavoro riportate di seguito. In just four years we raised $370 million and built a world?class team of 220+ employees, including 49+ PhDs with 40,000+ citations, distributed across 18 countries and offices in Belgium, France, Switzerland, Italy, the UK, and the Netherlands.We launched the Metis AI Platform, achieving 3–5x efficiency gains, and maintain a business pipeline exceeding $100 million. Our commitment to innovation has established us as a global industry pioneer.Position OverviewAs a Logical Design Engineer, you will join a team responsible for micro?architecture, implementation, and execution of in?house AI products. Your role is critical for achieving high quality and performance while driving continuous innovation in design and design flow.Key ResponsibilitiesCollaborate with cross?functional teams to clarify intricate design specifications and requirements.Architect and implement advanced micro?architectures from high?level specifications for silicon components, meeting performance, power, and area (PPA) metrics.Use industry?standard design tools and methodologies to build and optimize digital logic circuits.Conduct block and system?level RTL coding, ensuring optimal PPA.Integrate various IPs/Sub?IPs into the top?level SoC.Perform static checks (lint, CDC, equivalence checks) to enhance RTL quality.Automate tasks using scripting for efficiency gains.Undertake comprehensive functional verification and collaborate with verification engineers to ensure correctness.Participate in design reviews,



contributing technical expertise to improve design quality.Collaborate with physical design engineers on DFM and DFT considerations.Qualifications / SkillsEducationA degree in electronics engineering, electrical engineering, computer science, or a related discipline.ExperienceMinimum 5 years of silicon logical design experience, proven in RTL coding and synthesis, digital design, SoC, and integration of third?party IPs (PCIe, LPDDR), with fluency in Verilog.ExpertiseMastery of EDA tools for design and verification. Deep understanding of digital design principles, including clock domain crossing, low?power design, and timing closure.ScriptingProficiency in scripting languages such as Python, shell, or Tcl for automation.Collaboration / Team PlayerDemonstrated ability to work closely with architecture, verification, physical design, and software teams to ensure comprehensive coverage.Problem SolvingStrong analytical and problem?solving skills.CommunicationExcellent written and verbal communication skills in English. Comfortable working with a team spread across 15 countries.LocationWork from one of our offices (Leuven, Brussels, Amsterdam, Eindhoven, Zurich, Florence, Milan, Bristol) if you are already based nearby.Work fully remotely from any European country (incl. the UK).Relocate to Italy (Florence or Milan) or the Netherlands (Amsterdam or Eindhoven).What We OfferOpportunity to shape and thrive in a fast?growing, international organization. Compensation includes a pension plan, extensive employee insurances, and the option to receive company shares. An open culture that supports creativity, continual innovation, collaborative ownership, and freedom with responsibility. xrdztoy Axelera AI embraces equal opportunity and values diversity. We welcome applicants from all backgrounds to join us in shaping the future of AI. #J-*****-Ljbffr

Vedi l’offerta su Go Lavoro: golavoro.it/annuncio-lavoro/798u2l