Principal Engineer Functional Digital Design Verification (F/M/Div)
Pubblicato il 01-08-2026 - Experteer Italy in Pavia
Experteer Overview As Principal Engineer in our Research & Development team, you will lead digital verification for complex digital and mixed-signal designs, guiding verification planning and cross-team coordination. You will contribute hands?on, optimize verification flows, and mentor junior engineers to accelerate design closure. The role combines technical leadership with process improvements to boost efficiency and project outcomes. This position offers the chance to influence cutting?edge verification in a global semiconductor context and support sustainability?driven innovations. Retribuzione / Benefits * Lead verification of complex digital and mixed-signal designs (IPs, Subsystems, ASICs, SoCs) and manage verification planning, tracking, and reporting * Collaborate with concept, design, AMS verification, and post?silicon validation teams to ensure design quality * Act as hands?on contributor to digital verification,
building from scratch or adapting legacy environments * Promote reuse of Verification Components across directions * Identify and mitigate risks in dynamic, multi?site projects and communicate proactively * Drive verification process and flow improvements, pursue innovation projects and secure management buy?in * Mentor and provide technical guidance to junior verification engineers and development teams Responsabilità * 8+ years in Digital Verification with deep knowledge of verification for mixed?signal designs * 3+ years of leadership experience coordinating activities and mentoring engineers * Strong expertise in digital verification and achieving verification closure using state?of?the?art tools and methodologies (SV?UVM, Xcelium, vManager, Certitude) * Ability to work in a dynamic, multi?site environment and coordinate priorities Requisiti fondamentali * competitive salaries * benefits based on performance, experience and qualifications * full?time permanent employment * salary paid 14 times per year #J-*****-Ljbffr