Lead High-Speed SerDes Analog Design & Verification
Pubblicato il 04-08-2026 - Infineon Technologies in Pavia
Infineon Technologies AG in Pavia is looking for a Principal Analog Design and Verification Engineer to join our Research & Development team. This role offers the chance to merge creativity with technical expertise by shaping future technology through verification of high-speed SerDes systems.
Scopra esattamente quali competenze, esperienze e qualifiche sono necessarie per avere successo in questo ruolo prima di candidarsi.
The ideal candidate will have over 10 years of experience in mixed-signal verification and a strong background in high-speed SerDes concepts. We welcome diverse candidates to apply and embrace inclusivity in our hiring process. xysqume
Indicative Salary Range: €57,600 - €79,200 annually.
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