Senior Staff Analog Design Engineer

Vedi l’offerta su Go Lavoro: golavoro.it/annuncio-lavoro/7bzmi2

About Marvell

Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities.

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.

Your Team, Your Impact

Central Engineering – Optical PHY (CE-OPHY) team designs high-speed and optical transceivers for communication infrastructure in long-haul, metro and datacenter. We address the bandwidth, capacity and power issues faced by cloud computing, mega data centers that powers the social media giant platforms. Our innovative approaches have resulted in the company’s products being first to market in many of key areas, developing the most advanced chips and subsystems solutions to address the ever-increasing demand of higher data rates driven by video-on demand, gaming and other real time data streams.

We are seeking talented individuals to work on solving technical challenges with the most outstanding group of collaborators in the industry.

Join our team of experts and make a difference in an exciting career opportunity. As a member of a dynamic CE-OPHY team, the candidate will be responsible for designing circuits used for high-speed optical transceivers. The member will have an opportunity to work in deep submicron process and collaborate with the team on next-gen high-speed optical transceivers.

The position is located at our office in Pavia, Italy, and requires full-time on-site presence

What You Can Expect





- You will play a key role in developing high-performance analog or DSP- based transceivers operating in the multi-tens of GHz range, utilizing advanced CMOS nodes (3nm and beyond).
- Analyze block specifications and select appropriate topologies
- Design analog blocks at the transistor level
- Supervise layout activities, provide guidelines and conduct post-layout verifications
- Model blocks and validate models
- Collaborate with other teams to enhance existing solutions
- Train and mentor junior designers

What We're Looking For

- Master’s degree in Electrical Engineering, preferably with a specialization in Microelectronics, or a related field, with 6+ years of relevant work experience OR PhD in Electrical Engineering, preferably with a specialization in Microelectronics, or a related field, with 3+ years of relevant work experience.
- Experience in designing ICs from architecture definition to lab characterization, with full block ownership.
- Solid proficiency in analog design, preferably in the multi-GHz range.
- Extensive experience in performing or supervising analog custom layout.
- Strong familiarity with EDA CAD tools.
- Expertise in measuring IC performance and debugging designs to correlate simulations with measurements.
- Strong communication, presentation and documentation skills
- Proficiency in both spoken and written Italian and English (B2 level or higher)

​Direct project experience in at least one of the following areas a plus:
- Multi-Gbps electrical SerDes or electro-optical transceivers.
- Advance CMOS nodes, including FinFET.

This role is classified as Impiegato, under the Contratto Collettivo Nazionale di Lavoro per i dipendenti di aziende del terziario della distribuzione e dei Servizi.

Expected Base Pay Range 54,200 - 72,200, EUR per annum

Vedi l’offerta su Go Lavoro: golavoro.it/annuncio-lavoro/7bzmi2