Advanced Packaging

12 ago - Italia
Axelera AI

Position Overview

As a Senior Advanced Packaging & Power Delivery Engineer at Axelera AI, you will play a pivotal role in shaping the silicon and packaging architecture of next‑generation AI accelerators. You will own power‑delivery design across the full stack – from on‑die power grids to package and PCB PDN – and bring deep expertise in advanced packaging technologies to help us scale from today’s products to tomorrow’s multi‑chiplet, 3D‑integrated systems.

Working within our R&D; Custom Design team and collaborating closely with Silicon Engineering and AI Integrated Systems, you will be at the intersection of analog design, packaging innovation, and product delivery – with real ownership and direct impact on the chips we ship.

Key Responsibilities
- Own power‑delivery design end to end, from on‑die power grids to package and PCB PDN design and analysis.
- Lead advanced packaging architecture decisions for 2.5D/3D stacking, multi‑chiplet integration, and interposer/substrate co‑design.
- Perform SI/PI verification and sign‑off across the full stack,



ensuring power integrity and signal integrity targets are met.
- Collaborate with the AIIS and Silicon Engineering teams to align power delivery and packaging solutions with product and silicon requirements.
- Support thermal and integration reviews for current and future products.
- Develop and maintain power‑delivery methodology, flows, and design guidelines within the Custom Design toolchain.
- Identify and mitigate single‑point‑of‑failure risks in SI/PI workstreams; mentor and grow the team's packaging expertise.
- Engage with external partners, substrate/interposer vendors, and OSAT houses to co‑develop advanced packaging solutions.

Qualifications

Required
- Bachelor’s or Master’s degree in Electrical Engineering, Microelectronics, or a related field; PhD is a plus.
- 7+ years of experience in power delivery and/or advanced packaging design in a semiconductor or deep‑tech environment.
- Demonstrated expertise

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