Embedded AI Architect
Pubblicato il 13-08-2026 - Microtech Global in Italia
Job Title: Embedded AI Architect
Scorra verso il basso per una panoramica approfondita di questo lavoro e dei requisiti per i candidati. Invii la sua candidatura facendo clic sul pulsante "Candidati".Location: Pisa, Italy
Type: Permanent
Our client are an international semiconductor and consumer electronics company.
The RoleDesign architectural solutions for the operating system and middleware that can successfully integrate deterministic execution with novel agentic AI technologies.
Perform low-level performance analysis and optimization for CPUs, GPUs, NPUs, memory, network and other hardware components in embedded systems.
Increase the reliability and reduce end-to-end latencies of critical computations in the embedded systems.
Develop key OS technologies to support efficient AI model inference and heterogeneous resource scheduling, enabling a solid foundation for embedded AI applications
Must-Haves
- M.Sc degree in Computer Science, Computer or Electronic Engineering. PhD preferred.
- Experience on edge AI programming (e.g., LiteRT, TensorFlow Lite)
and know-how on mechanisms for deterministic AI inference.
- Know-how about machine learning, including CNN, DNN and SVM.
- Excellent knowledge of hardware architectures (SoC, MPU, MMU, interrupt controller, cache and memory hierarchy, memory virtualization, etc.), especially based on ARM or RISC-V ISA. Knowledge about strategies to reduce contention on shared hardware resources.
- Expert in kernel scheduling, real-time scheduling algorithms and memory management.
- Excellent knowledge of the C and C++ programming languages.
- Past experience in Assembly programming and implementation of device drivers.
- Know-how about internal design of the Linux kernel.
- Know-how about the POSIX standard.
- Know-how about the internal design of some RTOS (e.g., FreeRTOS, Zephyr, ERIKA). xivgfpx
- Expertise on modern distributed service-oriented architectures and strategies for improving determinism and reducing end-to-end latenci