Principal Analog Design and Verification Engineer
Pubblicato il 17-08-2026 - Elettrotecnica in Pavia
WeAreIn for jobs that impact everyone's life. Build the future nobody's dreamed of yet... are you ready to rethink the impossible? As a Principal Analog Design and Verification Engineer in our Research & Development team, you'll have the opportunity to merge creativity with your technical expertise by shaping the future of technology, driving groundbreaking projects, and bringing new ideas to life. Are you in?
Your Role Key Responsibilities Perform analog‐centric verification of high‐speed SerDes building blocks, including voltage‐ and current‐mode drivers, de‐/serializers, CTLE, VGA, slicers, and phase interpolators
Conduct high‐sigma verification to ensure robustness and reliability of high‐speed SerDes building blocks
Lead analog‐centric top‐level verification of high‐speed SerDes systems, covering key scenarios such as start‐up, power‐down, and IR drop analysis
Execute Analog‐Mixed Signal Verification of High Speed SerDes Building Blocks such as Clock‐and‐Data Recovery, Continuous‐Time Linear Equalization (CTLE), Adaptive Channel Equalization (FFE, DFE)
and Sampler Offset Compensation
Your Profile Qualifications and Skills 10+ years of experience in high‐speed analog‐centric mixed‐signal verification
Strong expertise in high‐speed SerDes concepts, including Clock and Data Recovery (CDR), Continuous‐Time Linear Equalization (CTLE), Adaptive Channel Equalization (FFE/DFE), and sampler offset compensation
In‐depth knowledge of SerDes building blocks such as voltage‐ and current‐mode drivers, de‐/serializers, CTLE, VGA, slicers, and phase interpolators
Proven experience with analog and analog/mixed‐signal simulation tools
Previous experience as an analog designer is considered a strong advantage
Fluency in English (mandatory)
Application Please send us your CV in English.
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