Lead Digital Verification Architect for SoCs/ASIC

17 ago - Pavia
Infineon Technologies

Infineon Technologies AG is seeking a Principal Engineer in Functional Digital Design Verification to lead the verification of complex digital and mixed-signal designs, including IPs, subsystems, ASICs and SoCs. You will coordinate planning, tracking, and reporting, and collaborate across teams to ensure verification quality.

You will actively contribute hands-on verification, drive improvements, and mentor junior engineers to advance verification methodologies and efficiency across multi-site

#J-18808-Ljbffr

Addetta alle Vendite Calzature - Roma Eur

18 ago - Roma
Umana

Receptionist

18 ago - Milano
castillo bords luijui marcelo

Ricevi nuove offerte di lavoro

Crea una Job Alert gratuita per lead digital verification architect for socs/asic / pavia

Barista

18 ago - Piacenza
NAM

Operaio/Operaia controllo qualità

18 ago - Forlì
OPENJOBMETIS