17 ago - Pavia
Ams Italy
ppRequisition IDb23102 /b-Postedb04/02/2026 /b /p pThe ams OSRAM Group is a global leader in innovative light and sensor solutions. With more than 110 years of industry experience, we combine engineering excellence and global manufacturing with a passion for cutting-edge innovation enabling transformative advancements in the automotive, industrial, medical, and consumer industries. "Sense the power of light" - our success is based on the deep understanding of the potential of light and distinct portfolio of emitter and sensor technologies. Around 19,700 employees worldwide drive innovations alongside societal megatrends.br/Find out more about us on /p pThe CSA division supplies sensors that bridge the gap between the world we live in and the digital world of machines. By converting physical signals - heartbeats, sounds, light waves - into data, we enable robots, cars and other devices to interact with people and improve our world. What drives CSA is a relentless desire to contribute to technology and have a meaningful impact on the world. This business thrives on solving complex problems and partnering with global leaders at the forefront of technological advancement. Our goal:
to push the boundaries of sensor technology and empower innovators to make the world smarter, healthier and happier. /p h3Your new responsibilities /h3 ul liPerform Digital Physical Implementation for complex integrated circuits /li liExecute all the steps of RTL2GDS flow (synthesis, floorplan, PlaceRoute, EMIR analysis, ECO flows) /li liInteract with digital designers to refine SDC timing constraints for synthesis and place route /li liRun Static Timing Analysis (STA) and Signoff checks /li liHelp to debug designs at both pre- and post-silicon /li liCollaborate with cross-functional teams to deliver optimized backend solutions /li /ul h3Who we are looking for /h3 ul liMaster's degree in Electronics Engineering, Electrical Engineering, Physics or similar /li liStrong proficiency in digital backend design tools and flows (Cadence flow) /li liSolid understanding of Signoff Checks (timing closure, signal integrity, EMIR, physical verification) /li liAbility to work independently and in team environments /li liExcellent problem-solving and communication skills /li liFluency in English is mandatory, Italian is beneficial /li /ul /p #J-18808-Ljbffr
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