FPGA Engineer – Satellite Communications & DSP Systems – Bari, Apulia – €DOE
Pubblicato il 17-08-2026 - EVEREC in Bari
ph3FPGA Engineer – Satellite Communications DSP Systems – Bari, Apulia – €DOE /h3 pbLocation: /b Bari, Apulia, Italy (Hybrid working available) /p pbSalary: /b From €32,000 RAL + stock option plan /p pbOverview: /b /p pA high-growth space technology company is seeking an experienced FPGA Engineer to join its core engineering team, developing next-generation satellite communication systems used across disaster response, emergency management, space monitoring, and defence applications. /p pThis role sits at the heart of the company’s technology stack, with full ownership of FPGA-based digital architectures – from initial system definition through to hardware validation. You will work in a multidisciplinary team combining DSP, FPGA, RF, and embedded software expertise, contributing directly to mission‑critical satellite platforms. /p pbKey Responsibilities: /b /p ul libFPGA Design DSP Implementation /b /li liDesign and optimise advanced RTL architectures in VHDL for Xilinx Series‑7 and UltraScale+/FPGAs /li liImplement and optimise DSP algorithms for digital and RF communication systems, including filtering, modulation/demodulation, and synchronisation /li liTranslate high‑level system and DSP requirements into efficient FPGA implementations /li liPerform simulation, testing, debugging, and performance verification using FPGA simulation tools and hardware test benches /li liSupport timing constraint definition and timing closure in complex FPGA designs /li liValidate designs on real hardware and contribute to system‑level performance analysis /li /ul ul libSystem Integration /b /li liSupport integration across multiple hardware boards and subsystems /li liContribute to end‑to‑end system validation and bring‑up activities /li liCollaborate closely with DSP, embedded software,
and system engineers to ensure robust end solutions /li /ul ul libTechnical Documentation /b /li liProduce clear technical documentation covering architectures, test results, and design decisions /li liSupport development traceability and knowledge sharing within the engineering team /li /ul pbRequired Skills Experience /b /p ul liMaster’s degree in Electronic Engineering, Telecommunications, or a related discipline (PhD considered a strong plus) /li li4+ years of hands‑on experience in FPGA / RTL design using VHDL /li liStrong understanding of DSP principles applied to digital communications /li liProven experience with Xilinx Vivado and simulation tools such as ModelSim / QuestaSim /li liSolid background in hardware testing, debugging, and validation /li liStrong problem‑solving mindset with the ability to work autonomously in a fast‑paced environment /li liFluent in technical English /li /ul pbPreferred Qualifications /b /p ul liExperience with SystemVerilog for advanced verification /li liMATLAB / Simulink experience for DSP modelling and validation /li liPython for test automation and scripting /li liKnowledge of digital communication architectures and channel coding techniques /li /ul pbWorking Pattern /b /p ul liHybrid working model with flexible hours /li liOnsite presence in Bari as required for system integration and validation activities /li /ul pbWhy Join /b /p ul liWork on real‑world satellite systems with direct societal and strategic impact /li liJoin a technically strong, fast‑scaling space startup environment /li liHigh ownership role with visibility across the full development lifecycle /li liCompetitive compensation package including equity participation /li /ul pIf this role is of interest, please apply via LinkedIn or contact for a confidential discussion. /p h3Seniority level /h3 ul liAssociate /li /ul h3Employment type /h3 ul liFull‑time /li /ul h3Job function /h3 ul liAviation and Aerospace Component Manufacturing, Defense and Space Manufacturing, and Telecommunications /li /ul pReferrals increase your chances of interviewing at EVEREC by 2x. /p /p #J-18808-Ljbffr