Design and Analysis Engineer

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Physical ASIC Design Implementation Engineer
For more than 25 years, imec has provided ASIC prototyping and production services to companies and universities worldwide. Imec supports its customers in designing integrated circuits and bringing them from the initial prototype stage through to production. Our customer base includes more than 900 universities and companies worldwide.
To further strengthen the Physical Digital Implementation Group, also known as the Back-End Group, within DSRD, we are looking for a highly motivated and experienced engineer.
As part of imec, DSRD has extensive industrial experience, strong relationships with leading semiconductor foundries, and long-standing collaborations with major EDA tool vendors and IP providers. The unit supports customers worldwide in the design, physical implementation, prototyping, fabrication, and testing of advanced electronic products.
As a Physical ASIC Design Implementation Engineer, you will work directly with customers on future projects and contribute to the complete Cadence Innovus Place-and-Route and sign-off flow.




Setting up and configuring the implementation flow for the selected technology node, foundry requirements, and library set
Setting up and implementing low-power designs using UPF
Performing floorplanning, macro placement, and power-grid design
Executing timing-driven placement and placement optimization
Performing static timing analysis and design optimization for setup timing
Implementing Clock Tree Synthesis
Performing scan-chain reordering and re-stitching
Executing timing-driven routing, including signal-integrity analysis
Debugging and resolving setup and hold violations
Performing sign-off static timing analysis using Tempus
Performing sign-off power and EM/IR analysis using Voltus
Executing physical verification, including DRC, ERC, LVS, and antenna checks
For hierarchical designs, you may take responsibility for design partitioning and derive timing budgets and constraints for individ

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