Physical design senior engineer
Pubblicato il 18-08-2026 - Openchip & Software Technologies in Italia
The Role As a Physical Design Senior Engineer , you will take technical ownership of the implementation for highly complex digital blocks, including high-speed interfaces, mixed-signal control logic, and automotive low-power modules. Working at the intersection of logic and physics, you are responsible for ensuring that the functional design intent is fully preserved while being highly optimized during the physical implementation phase. Key Responsibilities Advanced Physical Implementation & Constraint Ownership Full-Flow Execution: Take technical ownership of the RTL-to-GDSII implementation, including Floorplanning, Place and Route (P&R;), and Clock Tree Synthesis (CTS). Execution Strategy: Drive a "constraint-driven" approach to minimize iterations and ensure optimal physical results. Bottleneck Resolution: Analyze functional contexts to identify and resolve routing congestion and timing bottlenecks proactively. Constraint Maintenance: Hands-on management of SDC constraints at every stage; responsible for cleaning, regenerating,
and validating timing constraints to ensure they reflect silicon reality (e.g., Multi-Cycle Paths, False Paths). Timing Closure & ECO Implementation Sign-off Focus: Deliver complex timing closure for designs with multiple clock domains and asynchronous interfaces using DMSA and OCV/AOCV/POCV techniques. Advanced ECO Execution: Implement Engineering Change Orders (ECO) at the gate level and propose physical-level adjustments when required to meet timing or power targets. Design Integrity: Perform and validate Signal Integrity (SI) and Power Integrity (IR-Drop/EM) analyses to ensure robust sign-off. Requirements (Must Have) Experience: 10+ years of professional experience in Semiconductor Physical Design and Digital Implementation. SDC Expertise: Expert knowledge of SDC format with the ability to write, debug, and manage complex constraints for Multi-Mode Multi-Corner (MMMC) designs. Timing & STA: Solid hands-on experience with STA tools (Pri