About Si Pearl... Si Pearl is the European fabless designer of sovereign secure high-performance CPUs for HPC, AI and data centres. These CPUs will help address strategic challenges in the fields of security, defence, medical research, energy, climate and engineering with a reduced environmental footprint. In June 25, Si Pearl completed the design of the most complex CPU ever designed in Europe, Rhea1. Featuring 80 Arm Neoverse V1 cores, with 61 billion transistors, it is currently in production at TSMC. Sipearl CPUs will equip the two first European exascale supercomputers belonging to Euro HPC JU: Rhea1 will be integrated into the JUPITER machine based in Germany and Rhea2 will be part of Alice Recoque in France. Incubated Within The European Processor Initiative (EPI) Consortium And Seed-funded By The European Union, Si Pearl Employs Almost 200 People In : France (Maisons-Laffitte, Grenoble, Massy, Sophia Antipolis), Spain (Barcelona) and Italy (Bologna) Following a €130 million Series A, the company has launched its Series B round. About The Role At Si Pearl,

we are developing highly complex multi-chiplets/multi-sockets CPUs, based on latest technologies for processors, No Cs and overall architecture. Those need best in class emulation platforms, and that's what our team is proud to provide. Si Pearl owns one of the biggest emulation platform in Europe (in-house), a dual Veloce Strato M+, with a total capacity of 128 boards (6 BGates) and up to 30 concurrent users 24/7. We even model our physical evaluation board (BMC) to shift left the Firmware and Software development pre-silicon and validate pre-tape-out the entire software stack. As an Emulation Engineer at Si Pearl, you will be at the heart of our projects and R&D;, and an enabler for all teams success. Your missions Contribute to emulation setup: Participate in capturing emulation needs and help define emulator configurations. Support compilation, execution, and debugging flows. Support RTL adaptation for e

[permanent position] emulation engineer

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