MEMS Digital Verification
Pubblicato il 21-08-2026 - STMicroelectronics Italia in Cornaredo
OUR STORY At STMicroelectronics, we believe in the power of technology to drive innovation and make a positive impact on people, businesses, and society. As a global semiconductor company, our advanced technologies and chips form the hidden foundation of the world we live in today.
When you join ST, you will be part of a global business with more than 115 nationalities, present in 40 countries, and comprising over 50,000 diverse and dedicated creators and makers of technology around the world.
Developing technologies takes more than talent: it takes amazing people who understand collaboration and respect. People with passion and the desire to disrupt the status quo, drive innovation, and unlock their own potential.
Embark on a journey with us, where you can innovate for a future that we want to make smarter and greener, in a responsible and sustainable way. Our technology starts with you.
YOUR ROLE The position is aimed at Digital Verification engineer with previous experience in digital verification of ASIC.
The candidate will be part of digital verification team of MEMSs GROUP and they will have the opportunity to follow all the ASIC verification process from specification definition up to final product industrialization.
The responsibilities includes definition and development of verification testbench, development of verification components, development of DSP models and digital control logic, test case development for simulation, debugging failures and creating simulation cases for various scenarios.
The position is open on both Castelletto (Italy) and Toulouse (France) sites.
Your Skills & Experiences The preferred seniority is 3 to 5 years of experience.
Background in digital verification testbench (Universal Verification Methodology and System Verilog ), knows System Verilog and has experience with digital simulator tools.
Universal Verification Methodology, System Verilog Assertion, coverage, self-checking capabilities, testbench automation, bugs analysis a