21 ago - Pavia
Synopsys
Synopsys is seeking an experienced analog and mixed-signal layout designer to join the Solutions IP Design Group. You will own layout blocks across SERDES IP, collaborating with global teams and delivering robust IP solutions for diverse customer silicon.
Remote work is optional; you will mentor engineers and participate in layout reviews while using industry tools such as Custom Compiler, ICV, Calibre, Star-RCXT, and PERC, with Jira for project tracking.
J-18808-Ljbffr
22 ago - Giugliano in Campania
ADELANTE
22 ago - Marano di Napoli
Cimmino's di cimmino Luca &c
22 ago - Villaricca
ADELANTE
22 ago - Tito
SATRIANO