21 ago - Pavia
ams OSRAM
ams OSRAM is seeking a Technical Leader to own architecture and RTL development of high-speed digital subsystems for communication ICs and mixed-signal SoC products. You will define digital subsystem architectures and lead RTL integration, while driving design reviews and quality standards across verification and implementation teams. The ideal candidate has a MSc or PhD in Electrical Engineering with 10+ years of digital IC design experience, strong Verilog/SystemVerilog skills, and knowledge #J-18808-Ljbffr
22 ago - Montecosaro
Cronoshare.it
22 ago - San Costanzo
Cronoshare.it
22 ago - Teramo
Cronoshare.it
22 ago - Pergine Valsugana
Cronoshare.it