Physical ASIC Design Implementation Engineer

Vedi l’offerta su Go Lavoro: golavoro.it/annuncio-lavoro/7i13yp

We are looking for two Physical ASIC Design Implementation Engineers to strengthen our Physical Digital Implementation Group, in Naples. One of the positions is aimed at a more senior profile, who will take on a technical lead role in larger projects. You will work on full back-end projects, covering the complete flow from netlist-in to GDSII-out. The role includes both top-level chip implementation and block-level designs across technology nodes. A thorough understanding of the complete Cadence Innovus Place-and-Route flow is required.

What you will do

For more than 25 years, imec has provided ASIC prototyping and production services to companies and universities worldwide. Imec supports its customers in designing integrated circuits and bringing them from the initial prototype stage through to production. Our customer base includes more than 900 universities and companies worldwide.

To further strengthen the Physical Digital Implementation Group, also known as the Back-End Group, within DSRD, we are looking for a highly motivated and experienced engineer.

As part of imec,



DSRD has extensive industrial experience, strong relationships with leading semiconductor foundries, and long-standing collaborations with major EDA tool vendors and IP providers. The unit supports customers worldwide in the design, physical implementation, prototyping, fabrication, and testing of advanced electronic products.

As a Physical ASIC Design Implementation Engineer, you will work directly with customers on future projects and contribute to the complete Cadence Innovus Place-and-Route and sign-off flow.

Your responsibilities will include:
- Setting up and configuring the implementation flow for the selected technology node, foundry requirements, and library set
- Setting up and implementing low-power designs using UPF
- Performing floorplanning, macro placement, and power-grid design
- Executing timing-driven placement and placement optimization
- Performing static timing analysis

Vedi l’offerta su Go Lavoro: golavoro.it/annuncio-lavoro/7i13yp