Senior Design Verification Engineer - Data Fabric Systems
Pubblicato il 20-08-2026 - Luxoft in Lazio
ph3Senior Design Verification Engineer - Data Fabric Systems /h3 pAs Design Verification Engineer, you will join a leading-edge team responsible for the verification of advanced interconnect systems in state?of?the?art microprocessors.
This role focuses on ensuring the functionality, performance, and reliability ofores high?bandwidth data communication architectures.
/p pWe are looking for ??? a team player who is passionate about modern, complex processor architecture, digital design, and verification in general.
You should possess strong analytical and problem?solving skills, excellent communication, a willingness to learn, and readiness to accept challenges.
/p h3Responsibilities /h3 ul liPerform pre?Silicon Verification of next?generation high?performance Microprocessor designs and related IPs.
/li liDevelop, document, and execute verification test plans at the unit level of design hierarchy.
/li liDevelop high?level language testbench components including stimulus drivers, behavioral models, monitors, and checkers in SystemVerilog.
/li liDevelop, simulate, and debug directed/random stimulus to ensure design functionality according to specifications.
/li /ul h3Qualifications /h3 ul liMinimum of 5 years experience in Digital Design Verification.
/li liStrong skills with SystemVerilog and UVM; good skills with Verilog.
/li liExposure to both maintaining an existing Verification Environment and creating one from scratch.
/li liExperience with functional verification tools such as VCS, Cadence, and Mentor Graphics.
/li liExperience working in a Unix/Linux environment.
/li /ul h3Seniority level /h3 pMid?Senior level /p h3Employment type /h3 pFull?time /p h3Industries /h3 pITmaktad?rServices and IT Consulting /p /p #J-*****-Ljbffr