Design Verification Engineer - VLSI/ASIC/FPGA

22 ago - Italia
YO IT Group

Design Verification Engineer - VLSI/ASIC/FPGA Hardware

Possiede le competenze, l'esperienza e la determinazione necessarie per avere successo in questo ruolo? Lo scopra qui sotto.

Experience: 3 - 25 Years

Location: Permanent Remote anywhere in the World

Contract Length: 6 Months

Type: Tempo pieno contract (8 hrs/day) Overlap Hours: 4 hrs/day with PST

Mandatory Skills:

- Overall - 5 years of experience.
- Minimum of 2 years of relevant experience in Hardware Design and/or Hardware Verification.

Experience With One Or More On The List Below:

- ASIC
- VLSI
- FPGA
- SOC

Experience with one or more on the list below:

- SystemVerilog development
- Verilog development
- Testbench development and/or verification.

Good communication skills in English.

LLM experience is not mandatory; however, the candidate should be fine to work as a LLM Engineer for Verilog.

Must-Have:

- BS or MS degree in Electrical Engineering or related field.
- 3-5 years of proven experience in hardware design development.
- Expertise in HDLs such as Verilog, SystemVerilog, VHDL, and SystemC.
- Expertise in scripting, front-end and verification workflows, and integrations within the hardware design environment.
- Expertise in UVM environments.
- Expertise in Formal Verification.
- Expertise in Lint process and refinement.
- Good communication skills in English.

Job Description:





We're searching for an exceptional hardware design Developer to play a pivotal role in using the hardware design platform to generate the training data to enhance enterprise LLMs' capabilities. This unique position offers the chance to directly contribute to the sophistication of enterprise LLMs, ensuring they operate with unparalleled efficiency and intelligence.

Your Mission:

- Develop, configure, and customize the hardware design platform, utilizing it to generate vital training data for enterprise LLMs.
- Liaise with research teams to translate requirements into actionable data insights, directly impacting our LLMs' performance.
- Uphold the highest standards in coding, debugging, and documentation, ensuring the hardware design solutions are optimized for LLM training and benchmarking.
- Collaborate across teams to identify and prioritize needs, contributing to the LLMs' ability to understand and automate complex processes.

We Need:

- BS or MS degree in Electrical Engineering or related field.
- 3-5 years of proven experience in hardware design development.
- Expertise in HDLs such as Verilog, SystemVerilog, VHDL, and SystemC.
- Expertise in scripting, front-end and verification workflows, and integrations within the hardware design environment.
- Exceptional problem-solving, communication, and collaborative skills. xysqume Familiarity with ML and AI systems.

Seniority level
- Mid-Senior level

Employment type
- Contract

Job function
- Engineering and Information Technology

Industries
- IT Services and IT Consulting

#J-18808-Ljbffr

Real World Evidence Lead Endo-Metabolic, Global Rare Diseases

24 ago - Parma
Chiesi Farmaceutici

Addetto/A Qualita' - Sicurezza - Ambiente - Fino A €50.000 All'Anno

24 ago - Caldogno
Bicego HR

Ricevi nuove offerte di lavoro

Crea una Job Alert gratuita per design verification engineer - vlsi/asic/fpga / italia

CONSULENTE DEL LAVORO LIBERO PROFESSIONISTA

24 ago - Caselle torinese
Iqm Selezione S. R. L

Senior EnergyB Account Leader - Portafoglio in crescita

24 ago - Ancona
HRSpecialist Italia - Il Tuo Nuovo Lavoro