Senior Digital Verification engineer

23 ago - Napoli
STMicroelectronics Italia

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Role
We are looking for a Digital Verification Engineer – SoC to join our MDRF-RFOC-DVCC Digital Verification team in Naples , dedicated to the digital verification of complex SoC/IP for automotive / industrial applications.
The selected candidate will work on SystemVerilog UVM testbenches , firmware / drivers in C , and Python scripts for automation, contributing to the entire verification cycle: from strategy definition to environment creation, up to coverage analysis and debug.
Within the team we also use AI-assisted tools and methodologies to accelerate development, debug, and results analysis,



and we expect the candidate to be curious and interested in leveraging these technologies in day-to-day activities.
Main Responsibilities
- Define, in collaboration with architects and designers, the verification strategy at IP and/or SoC level.
- Develop and maintain UVM testbenches in SystemVerilog (environment, agent, sequencer, driver, monitor, scoreboard).
- Write and integrate C tests for subsystem and SoC verification in simulation and/or emulation environments.
- Develop Python scripts (and, when needed, bash/Tcl/Perl) for: regression automation, post‑processing of results, coverage analysis and report generation.
- Perform functional debug of failing test cases, interacting with the design (RTL) team and system architects.
- Run and debug gate‑level simulations with SDF back‑annotation, analyzing timing‑related issues and collaborating with design and implementation teams to identify and resolve problems.
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