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Junior Digital Design and RISC-V Architectures Engineer

Pubblicato il 23-08-2026 - Fondazione Chips-IT in Lodi

About Fondazione Chips-IT
The Foundation “Italian Center for the Design of Semiconductor Integrated Circuits,” also known as the Chips-IT Foundation, is a nonprofit research and technology organization under the supervision of the Ministries of Industry.
The Foundation is Italy’s first RTO (Research and Technology Organization) vertically focused on semiconductor research and stands as a center of excellence in frontier research on semiconductor design, as well as a pivotal center of the Italian semiconductor ecosystem and expertise.
Missions Of The Foundation
- Promote the design and development of integrated circuits
- Strengthen the system of professional training in the field of microelectronics
- Ensure the establishment of a network of universities, research centers and enterprises that fosters innovation and technology transfer in the field

Posizione
The Chips-IT Foundation is seeking seeking Junior Researchers to contribute to cutting-edge research and development initiatives centered on digital design and RISC-V architectures.



The project focuses on developing advanced digital processors, accelerators, and custom SoCs based on the RISC-V instruction set architecture (ISA) as well as dedicated accelerators.
This role will involve participating in the design, optimization, and verification of high-performance, low-power digital systems for applications in next-generation computing platforms, IoT, and embedded systems. Junior Researchers will have the opportunity to learn and apply novel design methodologies, verification techniques, and hardware-software co-design strategies to support innovation in the RISC-V ecosystem. The work can be carried out either in Pavia or in Bologna.
Key Responsibilities
- Support research and development activities related to digital designs, including processors, accelerators, and SoCs based on the RISC-V architecture.
- Assist in the design, implementation, and verification of digital building blocks (Processors, Accelerators,

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