ppLo sviluppo di tecnologie richiede più del solo talento: siamo infatti alla ricerca di persone straordinarie che comprendano la collaborazione e il rispetto.
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Intraprendi un viaggio con noi, dove puoi innovare per un futuro che vogliamo rendere più intelligente e più verde, in modo responsabile e sostenibile.
La nostra tecnologia inizia con te.
/p h3Role /h3 pWe are looking for a bDigital Verification Engineer – SoC /b to join our bMDRF-RFOC-DVCC /b Digital Verification team in bNaples /b, dedicated to the digital verification of complex bSoC/IP /b for bautomotive / industrial /b applications.
/p pThe selected candidate will work on bSystemVerilog UVM testbenches /b, bfirmware / drivers in C /b, and bPython scripts /b for automation, contributing to the entire verification cycle: from strategy definition to environment creation, up to coverage analysis and debug.
/p pWithin the team we also use bAI-assisted tools and methodologies /b to accelerate development, debug, and results analysis, and we expect the candidate to be curious and interested in leveraging these technologies in day-to-day activities.
/p h3Main Responsibilities /h3 ul liDefine, in collaboration with architects and designers, the verification strategy at IP and/or SoC level.
/li liDevelop and maintain UVM testbenches in SystemVerilog (environment, agent, sequencer, driver, monitor, scoreboard).
/li liWrite and integrate C tests for subsystem and SoC verification in simulation and/or emulation environments.
/li liDevelop Python scripts (and, when needed, bash/Tcl/Perl) for: regression automation, post?processing of results, coverage analysis and report generation.
/li liPerform functional debug of failing test cases, interacting with the design (RTL) team and system architects.
/li liRun and debug gate?level simulations with SDF back?annotation, analyzing timing?related issues and collaborating with design and implementation teams to identify and resolve problems.
/li liAnalyze and manage functional coverage and code coverage,

proposing new tests or testbench improvements to meet quality targets.
/li liUse AI?assisted tools and workflows for: generation and review of testbench code and scripts, log analysis, debug acceleration.
/li liContribute to the continuous improvement of verification flows (methodologies, common libraries, guidelines, best practices).
/li liProduce clear and structured documentation for: verification specifications, testbench architecture, test plans, key results.
/li /ul h3Technical Requirements /h3 h3Mandatory (must?have) /h3 ul liDegree in Electronic Engineering, Computer Engineering/Science, Physics with an electronics focus, or related disciplines.
/li liSolid knowledge of digital verification of integrated circuits (RTL concepts, testbench, stimuli, checkers, coverage).
/li liHands?on experience with SystemVerilog and UVM methodology: development of UVM components (sequencer, driver, monitor, scoreboard), environment configuration, sequence and virtual sequence management.
/li liGood command of the C language for verification?oriented test/firmware driver development.
/li liExperience with Python for scripting and automation.
/li liGood knowledge and practical use of the Unix/Linux environment (shell, file system, batch jobs, compilation, basic scripting).
/li liFamiliarity with major digital simulators (e.g. Cadence Xcelium, Synopsys VCS, Siemens Questa).
/li liBasic knowledge of version control flows (Git, SVN, DesignSync).
/li liGood command of written and spoken English.
/li li5?8 years of experience in the role.
/li /ul h3Desirable (nice?to?have) /h3 ul liExperience with SoC/IP verification (AMBA/AXI/APB/AHB buses, memory interfaces, peripherals, interrupt controllers, DMA, etc.).

/li liBasic knowledge of machine learning / AI and use of AI tools for: code generation, log analysis, test and scenario creation.
/li liKnowledge of formal verification techniques (e.g. property checking, assertion?based verification) and familiarity with formal tools.
/li liExperience in ISO ***** environments.
/li liKnowledge of other scripting languages (bash, Tcl, Perl) and related EDA tools (lint, CDC, STA) is a plus.
/li /ul h3Personal Skills /h3 ul liAnalytical mindset and strong problem?solving attitude.
/li liAttention to detail and strong product quality orientation.
/li liAbility to work in cross?functional teams (design, architecture, emulation, firmware).
/li liProactivity in proposing flow improvements and automation.
/li liWillingness to learn new technologies, particularly AI tools and methodologies applied to engineering.
/li liGood communication and technical documentation skills.
/li /ul pST è orgogliosa di essere una delle 17 aziende certificate come Top Employer Globale **** e la prima e unica azienda di semiconduttori a raggiungere questa distinzione.
ST è stata riconosciuta in questa classifica grazie al suo approccio di miglioramento continuo e si distingue particolarmente nelle aree di etica e integrità, scopo e valori, organizzazione e cambiamento, strategia aziendale e performance.
/p pIn ST, ci impegniamo a promuovere un ambiente di lavoro diversificato e inclusivo, e abbiamo tolleranza zero per la discriminazione.
Miriamo a reclutare e mantenere una forza lavoro diversificata che rifletta le società intorno a noi.
Ci sforziamo per l'equità nello sviluppo della carriera, nelle opportunità di carriera e nella remunerazione equa.
Incoraggiamo i candidati che potrebbero non soddisfare tutti i requisiti a presentare domanda, poiché apprezziamo le prospettive diverse e offriamo possibilità di crescita e apprendimento.
La diversità, l'equità e l'inclusione (DEI) sono intrecciate nella nostra cultura aziendale.
La nostra visione DEI è: "In ST, puoi essere la versione autentica di te stesso".
/p pPer saperne di più visita il sito: st.com/careers /p /p #J-*****-Ljbffr

Senior Digital Verification Engineer

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