03 set - Italia
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European Tech Recruit in Pavia, Italy is seeking a Senior Analog IC Design Engineer to join a fast‐growing semiconductor startup focused on ASIC development.
You will design and simulate high‐performance analog/mixed‐signal blocks, own the design from architecture to layout, and mentor junior engineers.
The role requires 5+ years in analog IC design, hands‐on CMOS experience, and proficiency with Cadence Virtuoso and Spectre; collaboration across layout and verification is essential.
J-18808-Ljbffr
04 set - Alessandria
Febal Casa
04 set - Mantova
Febal Casa
04 set - Roma
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04 set - Novara
Febal Casa