Design layout Engineer
Pubblicato il 04-09-2026 - 1460 Micron Semiconductor Ital in Avezzano
Department Introduction
The Non-Volatile NAND Design Engineering group is responsible for the design and optimization of analog, digital and mixed-signal circuits enabling advanced NAND Flash memory products. Close collaboration with multi-functional teams ensures scalable, manufacturable, and reliable solutions across technology nodes.
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Role Overview
As a Layout Design Engineer at Micron Semiconductor Italia, you will play a critical role in the physical implementation of advanced NAND Flash products, working across analog, custom digital, and mixed‑signal circuits. Beyond traditional layout excellence, this role places strong emphasis on automation, AI‑assisted methodologies, and data‑driven layout optimization, which are central to Micron’s future design strategy. You will actively contribute to evolving the layout field from manual execution toward scalable, high‑productivity, and intelligent build approaches.
Responsibilities
- Design and implement complex analog, mixed-signal, and custom digital layout blocks (e.g., charge pumps, regulators, oscillators, IO, sensors).
- Perform layout integration activities including floorplanning, placement, routing, and parasitic-aware optimization.
- Support design validation through parasitic extraction, simulation correlation, silicon learning, and tape‑out revisions.
- Collaborate with multi-functional teams (build, CAD, modeling, product engineering) to ensure manufacturability, quality, and performance targets.
- Develop and drive automation and AI‑assisted layout methodologies (e.g., parameterized layout, scripting, data‑driven optimization).
- Contribute to methodology improvement, user documentation.
Minimum Qualifications
- B.S. in Electrical Engineering, Electronics, data science, or a related field, with equivalent experience considered.
- Hands‑on experience with layout and verification tools (e.g., Cadence Virtuoso, Calibre LVS/DRC).
- Understanding of advanced layout techniques (matching, shielding, EM, ESD, latch‑up, HV design constraints).
- Experience with AI‑assisted design methodologies or data‑driven optimization approaches.
- Strong problem‑solving and communication skills, with ability to work in multi‑functional environments.
Preferred Qualifications
- Experience in NAND Flash or other non-volatile memory technologies.
- Familiarity with scripting and automation (e.g., Python) applied to layout or design flows.
- Experience collaborating on silicon validation, bring‑up, or yield improvement activities.
Compensation
The base salary range that Micron estimates it could pay in for this position full‑time is: 29.000,00 € - 48.000,00 € per year, with B1 CCNL Level. The range displayed on each job posting reflects the minimum and maximum target base pay for new hire salaries of the position. Within the range, individual pay is determined by work location and additional job‑related factors, including knowledge, skills, experience, tenure and relevant education or training. The pay scale is subject to change depending on business needs.
Benefits
In addition to base pay, the remuneration package also includes eligibility for a variable plan subject to the personal achievement of objectives and the company’s performance, and benefits, which -at the discretion of the company- currently include meal vouchers, corporate welfare, yearly allowance of remote working days, supplementary health insurance, life coverage, Employee Assistance Program.
EEO Statement
All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, veteran or disability status. xysqume Remuneration is determined by objective criteria, regardless of gender and of any other factor protected by applicable federal, state, or local laws.
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