Principal Physical Design Engineer

09 set - Catania
Nxp Semiconductors

NXP's Industrial & IoT Edge solutions range from the smallest MCUs to very high-performance processors to provide real-time insights and efficient automation when performance matters most. NXP's advanced portfolio of edge processing solutions lets developers explore their most innovative ideas with confidence, enabling applications across the autonomous home, industrial automation, and personal electronics. NXP is building new teams in Catania to create high impact micro-controllers (MCU) as part of NXP's intelligent AI at the Edge. This team will include a wide range of engineering talent from analog to SOC digital design. Full product development local will product world class products at a world class pace. This role will contribute to the physical design and implementation of complex, high-performance semiconductor integrated circuits, driving technical solutions in key areas such as static timing closure, floorplanning, place and route, and physical verification. The role also includes mentoring and developing junior engineers,



while ensuring the timely delivery of cutting‑edge products across NXP's diverse portfolio.

Your Responsibilities
- Floorplanning, power grid design, place and route, low power implementation, clock tree synthesis, timing closure, power/signal integrity analysis, physical verification (DRC/LVS/Antenna).
- Drive the definition and implementation of physical design methodologies, flows, and best practices to optimize performance, power, and area.
- Perform comprehensive static timing analysis (STA) and ensure all timing constraints are met across various corners and modes.
- Conduct power integrity (IR drop) and signal integrity (Crosstalk) analysis and implement solutions to mitigate issues.
- Oversee and perform design rule checking (DRC), layout versus schematic (LVS), and other physical verification steps to ensure tape-out readiness.
- Collaborate closely with architecture, RTL design, DFT, and package teams to ensure seamless integr

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