Researcher – Process Design Kits
Pubblicato il 10-09-2026 - Fondazione Chips-IT in Bardi
Researcher – Process Design Kits (PDKs) and Compact Modeling for Wide Bandgap Technologies
Se i requisiti e l'esperienza richiesti per questo lavoro corrispondono alle sue competenze, la preghiamo di candidarsi tempestivamente.
Fondazione Chips-IT Pavia, Pavia, IT
About Fondazione Chips-IT
The Foundation “Italian Center for the Design of Semiconductor Integrated Circuits,” also known as the Chips-IT Foundation, is a nonprofit research and technology organization under the supervision of the Ministries of Industry.
The Foundation is Italy’s first RTO (Research and Technology Organization) vertically focused on semiconductor research and stands as a center of excellence in frontier research on semiconductor design, as well as a pivotal center of the Italian semiconductor ecosystem and expertise.
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- Promote the design and development of integrated circuits
- Strengthen the system of professional training in the field of microelectronics
- Ensure the establishment of a network of universities,
research centers and enterprises that fosters innovation and technology transfer in the field
Posizione
The Chips-IT Foundation is seeking Researchers to contribute to cutting-edge research and development activities focused on the development of Process Design Kits (PDKs) and compact models for Wide Bandgap (WBG) semiconductor technologies within the framework of the European Chips Joint Undertaking Pilot Line initiative.
The project focuses on enabling the adoption of advanced SiC and GaN technologies through the development of technology-specific compact models, Process Design Kits, and their integration into state-of-the-art Electronic Design Automation (EDA) environments. The successful candidate will contribute to bridging technology development and integrated circuit design by supporting the creation of reliable design platforms for next-generation power, RF and mixed-signal applications.
This role will involve participating in the development, validation and mainte