12 set - Pavia
ams OSRAM
ams OSRAM is seeking a Technical Leader to own architecture and RTL development of high-speed digital subsystems for communication ICs and mixed-signal SoC products. You will define digital subsystem architectures and lead RTL integration, while driving design reviews and quality standards across verification and implementation teams.
The ideal candidate has a MSc or PhD in Electrical Engineering with 10+ years of digital IC design experience, strong Verilog/SystemVerilog skills, and knowledge
J-18808-Ljbffr
12 set - Lombardia
MARTINA RE S.p.A. asset \u0026 development management
12 set - Senigallia
Altro
12 set - Santa Flavia
Altro
12 set - Latina
Omega Pharma