13 set - Cascina Priora
ams OSRAM
ph3Responsibilities /h3 ul liPerform Digital Physical Implementation for complex integrated circuits /li liExecute all the steps of RTL2GDS flow (synthesis, floorplan, PlaceRoute, EMIR analysis, ECO flows) /li liInteract with digital designers to refine SDC timing constraints for synthesis and place route /li liRun Static Timing Analysis (STA) and Signoff checks /li liHelp to debug designs at both pre- and post-silicon /li liCollaborate with cross-functional teams to deliver optimized backend solutions /li /ul h3Qualifications /h3 ul liMaster’s degree in Electronics Engineering, Electrical Engineering, Physics or similar /li liStrong proficiency in digital backend design tools and flows (Cadence flow) /li liSolid understanding of Signoff Checks (timing closure, signal integrity, EMIR, physical verification)
/li liAbility to work independently and in team environments /li liExcellent problem-solving and communication skills /li liFluency in English is mandatory, Italian is beneficial /li /ul pams OSRAM is an Equal Employment Opportunity Employer. Diversity, equity and inclusion is strongly established in our corporate culture and we firmly believe it makes us more successful as a company. All qualified applications will receive consideration for employment regardless of ethnic, national or social origin, gender, gender identity, sexual orientation, color, religion, age, physical and mental abilities. /p /p #J-18808-Ljbffr
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