Junior Physical Design Engineer for AI-at-the-Edge MCUs

14 set - Catania
Nxp Semiconductors

NXP Semiconductors in Catania invites applications for a Junior Physical Design Engineer. You will learn and execute the RTL-to-GDSII physical implementation flow for complex SoC/MCU designs on advanced nodes, working closely with experienced engineers to meet performance, power, and area targets.
You will also support floorplanning, P&R;, CTS, and verification, and collaborate with RTL, DFT, and Analog teams while developing automation scripts to boost flow efficiency.

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