MEMS Analog Senior Architect and Designer
Pubblicato il 14-09-2026 - Stmicroelectronics in Cornaredo
Questa posizione è in STMicroelectronics
Il processo di selezione sarà interamente gestito STMicroelectronics.
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OUR STORY At STMicroelectronics, we believe in the power of technology to drive innovation and make a positive impact on people, businesses, and society. As a global semiconductor company, our advanced technologies and chips form the hidden foundation of the world we live in today. When you join ST, you will be part of a global business with more than 115 nationalities, present in 40 countries, and comprising over 50,000 diverse and dedicated creators and makers of technology around the world. Developing technologies takes more than talent: it takes amazing people who understand collaboration and respect. People with passion and the desire to disrupt the status quo, drive innovation, and unlock their own potential. Embark on a journey with us, where you can innovate for a future that we want to make smarter and greener, in a responsible and sustainable way. Our technology starts with you.
YOUR ROLE The role is aimed at accelerating the definition and the implementation of IC in MEMS solutions through the development of innovative and optimized architectures. The requested figure is represented by a brilliant system architect able to propose ideas and design solutions in the context of analog front end for inertial MEMS. The activities will be focused on architectural study and system definition, strongly interacting with other departments. Candidate’s key role is based on the translation from system-level specification to block level specification, developing models to predict system perfomances, following transistor-level implementation and all simulation/ verification activities. The candidate will work also closely to the layout engineer to drive top level implementation. He/She will participate to the evaluation and characterization of the followed products to verify the functionality and the adherence of the developed models vs the actual silicon