14 set - Monza
Onsemi
onsemi is looking for a Principal Verification Engineer in Milano, Italy. The role requires strong expertise in SystemVerilog and UVM, with a focus on both block-level and SoC-level verification of integrated circuits.
Ideal candidates will have 7–10+ years of experience and a solid understanding of verification methodologies. Responsibilities include developing verification plans, maintaining verification environments, and collaborating with cross-functional teams to ensure optimal verification processes.
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