18 set - Pavia
Ams Italy
Technical leader responsible for HF analog layout strategy for broadband optical communication ICs or comparable RF ICs Lead layout architecture and floorplanning activities Develop and enforce layout methodologies Drive parasitic-aware implementations Support design teams through sign-off Mentor layout engineers BSc or MSc in Electrical Engineering 10+ years RF/analog layout experience HF analog layout for broadband optical communication ICs or comparable RF ICs, including high-speed receiver/transmitter interfaces Matching, shielding and isolation Advanced CMOS node experience, including Fin FET and/or FD-SOI, is required EM-aware layout methodologies
20 set - Solofra
Top Conatct
20 set - Frabosa Sottana
Essedue
20 set - Catania
Top Conatct
20 set - Sacrofano
interedilgroup