Soc/Fpga Engineer
Pubblicato il 21-09-2026 - Nokia in Casagiove
OverviewIn this role you drive the architecture, design and validation of ASICs for optical modules within Nokia's Optics Subsystems. You will work in an international SoC team to push higher transmission bandwidth while reducing power and size. You'll translate standards into framer designs, optimize RTL/verification flows, and collaborate across synthesis, physical design, firmware and systems teams. This is a hands-on, impact-focused opportunity to shape next-generation coherent transmission technologies.Retribuzione / BenefitsFlexible and hybrid working schemesMaternity and paternity leaveLife insuranceWell-being programsNERGs and coaching/mentorsLearning and career growth opportunitiesResponsabilitàArchitect, specify, design and test ASICs for optical modules.Translate standards into framer architecture and optimize RTL/verification flows.Collaborate with ASIC synthesis, implementation and physical design teams for handoff and optimization.Mentor junior engineers and contribute to team knowledge sharing.Collaborate with systems, hardware,
software and firmware teams across Nokia locations.Contribute to Framer development flow and integrate IPs, with a focus on efficiency and QoR.Requisiti fondamentaliMaster's degree or PhD in Electronic Engineering, Microelectronics, Telecommunication Engineering or equivalentStrong knowledge of IEEE transmission standards (IEEE 802.3 focus) and Ethernet rates above 100GProven experience in ASIC design and verification and access to toolchains (Synopsys, Mentor, Cadence)Proficiency in VHDL, Verilog, SystemVerilog; TCL and Python scriptingRTL design and verification experience with emphasis on high-performance, low-power ASICsUVM verification experience is a plusBasic knowledge of ECC theory and algorithmsBasic firmware development knowledge (C/C++, drivers, APIs); advanced skills a plusGood written and spoken English; strong collaboration with international partnersExcellent communication skillsCross-functional collaborationMentoring and technical leadershipASIC design and verification workflowsRTL design (VHDL/Verilog/SystemVerilog)UVM (plus)