22 set - Mairago
Ams Italy
ams Italy S.r.l. is seeking a Technical Leader to drive architecture and RTL development for high-speed digital subsystems in communication ICs and mixed-signal SoC products.
You will define digital architectures, lead RTL design and integration, and mentor engineers within a collaborative team. Requirements include an MSc/PhD in Electrical Engineering and 10+ years of digital IC design, with expertise in Verilog/SystemVerilog, Synthesis, timing analysis, and exposure to FinFET/FD-SOI processes.
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23 set - Roma
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