Senior Digital Design Architect for High‑Speed ICs

22 set - Casaletto Lodigiano
Ams Italy

ams OSRAM is seeking an experienced engineering leader to architect and drive RTL development for high-speed digital subsystems in communication ICs and mixed-signal SoCs.

The role requires a strong background in RTL design (Verilog/SystemVerilog), CMOS process nodes, and timing analysis across fast interfaces. You will mentor engineers and coordinate architecture reviews in a global R&D; environment.

#J-18808-Ljbffr

Corporate and Leveraged Finance Intern

01 ott - Lombardia
Crédit Agricole Cib

M&A Associate

01 ott - Lombardia
Sparq.

Ricevi nuove offerte di lavoro

Crea una Job Alert gratuita per senior digital design architect for high‑speed ics / casaletto lodigiano

Tecnico di assistenza Elettronico IT

01 ott - Emilia-Romagna
Etjca Group

ML Researcher (Remote)

01 ott - Torino
Hire Feed