22 set - Salice Terme
Ams Italy
ph3Your tasks /h3 /brul /brliTechnical leader responsible for architecture and RTL development of high-speed digital subsystems for communication ICs and mixed-signal SoC products /li /brliDefine digital subsystem architectures /li /brliLead RTL development and integration /li /brliDrive design reviews and quality standards /li /brliSupport verification and implementation teams /li /brliMentor design engineers /li /br /ul /brh3Who we are looking for /h3 /brul /brliMSc or PhD in Electrical Engineering /li /brli10+ years digital IC design experience /li /brliRTL design (Verilog/SystemVerilog) /li /brliHigh-speed digital IC design experience for communication or mixed-signal SoC products is required; knowledge of high-speed interfaces such as UCIe,
PCIe or similar protocols is an advantage /li /brliInterface protocols and clock-domain crossing /li /brliSynthesis and timing analysis /li /brliAdvanced CMOS node experience, including FinFET and/or FD-SOI, is required /li /br /ul /brpams OSRAM is an Equal Employment Opportunity Employer. Diversity, equity and inclusion is strongly established in our corporate culture and we firmly believe it makes us more successful as a company. All qualified applications will receive consideration for employment regardless of ethnic, national or social origin, gender, gender identity, sexual orientation, color, religion, age, physical and mental abilities. /p /p #J-18808-Ljbffr
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