22 set - Motta Visconti
Ams Italy
pams Italy S.r.l. seeks a Technical Leader for architecture and RTL development of high-speed digital subsystems in communication ICs and mixed-signal SoCs. You will define digital architectures, lead RTL integration, and drive design reviews while supporting verification teams. /ppThe role requires a PhD/MSc in EE with 10+ years in digital IC design, RTL in Verilog/SystemVerilog, and experience with FinFET/FD-SOI nodes. Knowledge of UCIe/PCIe interfaces is advantageous. /p #J-18808-Ljbffr
23 set - Lecce
Snai
23 set - Tempio Pausania
Serafina
23 set - Grosseto
Il Globo Vigilanza
23 set - Bolzano
Kpmg Italy