22 set - Montebello della Battaglia
Ams Italy
ams Italy S.R.L.Aumenti le sue possibilità di ottenere un colloquio leggendo la seguente panoramica di questo ruolo prima di candidarsi.seeks a Technical Leader for architecture and RTL development of high-speed digital subsystems in communication ICs and mixed-signal SoCs.You will define architectures, lead RTL development, and drive design reviews while mentoring engineers.Requirements include MSc/PhD in Electrical Engineering and 10+ years in digital IC design with RTL (Verilog/SystemVerilog). xysqume Knowledge of high-speed interfaces like UCIe/PCIe is a plus.#J-18808-Ljbffr
24 set - Milano
3240 Kyndryl Italia
24 set - Gaggiano
Ams Italy
24 set - Orta San Giulio
Cannavacciuologroup
24 set - Sommariva del Bosco
Bachecalavoro