22 set - Pioltello
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ams OSRAM is seeking a technical leader responsible for architecture and RTL development of high-speed digital subsystems for communication ICs and mixed-signal SoC products in Seggiano, Italy.
Si candidi (facendo clic sul pulsante apposito) dopo aver controllato tutte le informazioni di lavoro riportate di seguito.
The ideal candidate holds an MSc or PhD in Electrical Engineering with 10+ years in digital IC design, RTL (Verilog/SystemVerilog), and experience with high-speed interfaces and clock-domain crossing. xkiyazw
Strong leadership, design-review discipline, and mentoring are essential.
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