Fpga Engineer – Satellite Communications & Dsp Systems – Bari, Apulia – €doe
Pubblicato il 23-09-2026 - EVEREC in Bari
FPGA Engineer – Satellite Communications & DSP Systems – Bari, Apulia – €DOEVerifichi che le sue competenze e la sua esperienza corrispondano ai requisiti di questo ruolo, quindi si candidi con il suo CV qui sotto.Location: Bari, Apulia, Italy (Hybrid working available)Salary: From €32,000 RAL + stock option planOverview:A high-growth space technology company is seeking an experienced FPGA Engineer to join its core engineering team, developing next-generation satellite communication systems used across disaster response, emergency management, space monitoring, and defence applications.This role sits at the heart of the company’s technology stack, with full ownership of FPGA-based digital architectures – from initial system definition through to hardware validation. You will work in a multidisciplinary team combining DSP, FPGA, RF, and embedded software expertise, contributing directly to mission‑critical satellite platforms.Key Responsibilities:FPGA Design & DSP ImplementationDesign and optimise advanced RTL architectures in VHDL for Xilinx Series‑7 and UltraScale+/FPGAsImplement and optimise DSP algorithms for digital and RF communication systems, including filtering, modulation/demodulation, and synchronisationTranslate high‑level system and DSP requirements into efficient FPGA implementationsPerform simulation, testing, debugging, and performance verification using FPGA simulation tools and hardware test benchesSupport timing constraint definition and timing closure in complex FPGA designsValidate designs on real hardware and contribute to system‑level performance analysisSystem IntegrationSupport integration across multiple hardware boards and subsystemsContribute to end‑to‑end system validation and bring‑up activitiesCollaborate closely with DSP, embedded software,
and system engineers to ensure robust end solutionsTechnical DocumentationProduce clear technical documentation covering architectures, test results, and design decisionsSupport development traceability and knowledge sharing within the engineering teamRequired Skills & ExperienceMaster’s degree in Electronic Engineering, Telecommunications, or a related discipline (PhD considered a strong plus)4+ years of hands‑on experience in FPGA / RTL design using VHDLStrong understanding of DSP principles applied to digital communicationsProven experience with Xilinx Vivado and simulation tools such as ModelSim / QuestaSimSolid background in hardware testing, debugging, and validationStrong problem‑solving mindset with the ability to work autonomously in a fast‑paced environmentFluent in technical EnglishPreferred QualificationsExperience with SystemVerilog for advanced verificationMATLAB / Simulink experience for DSP modelling and validationPython for test automation and scriptingKnowledge of digital communication architectures and channel coding techniques xysqume Working PatternHybrid working model with flexible hoursOnsite presence in Bari as required for system integration and validation activitiesWhy JoinWork on real‑world satellite systems with direct societal and strategic impactJoin a technically strong, fast‑scaling space startup environmentHigh ownership role with visibility across the full development lifecycleCompetitive compensation package including equity participationIf this role is of interest, please apply via LinkedIn or contact for a confidential discussion.Seniority levelAssociateEmployment typeFull‑timeJob functionAviation and Aerospace Component Manufacturing, Defense and Space Manufacturing, and TelecommunicationsReferrals increase your chances of interviewing at EVEREC by 2x.#J-18808-Ljbffr