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DSP System Engineering Intern

Pubblicato il 23-09-2026 - Marvell Technology in Pavia

About Marvell
Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities.

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.

Your Team, Your Impact
Marvell Technology, Inc. is principally engaged in delivering the data infrastructure technology that connects the world. A critical IP in these market is high speed serial data transmission (SerDes), through both electrical and optical media, generally referred as PHYs when considered within the Ethernet protocol stack. PHY speed at low level is evolving towards 400Gb/s but as physical limits are getting closer, new architectural solutions are needed to continue the growth process. This includes circuits, DSP,



modulation, and coding as well as optical components, contributing to the creation of a very challenging and exciting work that involves multidisciplinary teams.

We are looking for a young talented engineer to join the system architecture team and work on next generation PHY design.

The duration of the thesis/internship will be about five months, with flexibility.
What You Can Expect
- You will be part of the Architecture team.
- You will be introduced to state-of-the-art PHY design.
- You will familiarize with different modeling approaches for system design and simulation.
- You will work on link budgeting, non-ideality modeling and system simulation.
- You will analyze DSP challenges and opportunities, explore and compare different optimization directions, and generate tradeoff curves of performance and cost.
- You will be supervised in all the phases of your work with a reference per

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