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Ams Verification Engineer

Pubblicato il 22-09-2026 - Stmicroelectronics in Catania

LA NOSTRA STORIA
Noi di ST crediamo nel potere della tecnologia di guidare l'innovazione e avere un impatto positivo sulle persone, sulle imprese e sulla società. Siamo un'azienda globale di semiconduttori e la nostra tecnologia avanzata e i nostri chip costituiscono la parte nascosta del mondo in cui viviamo oggi.
Entrando in ST farai parte di un'azienda di oltre 115 nazionalità e presente in 40 paesi, con oltre ****** creatori di tecnologia in tutto il mondo!
Lo sviluppo di tecnologie richiede più del solo talento: siamo infatti alla ricerca di persone straordinarie che comprendano la collaborazione e il rispetto. Persone con passione e desiderio di andare oltre i confini e guidare l'innovazione, sbloccando al tempo stesso il proprio potenziale.
AMS Verification Engineer
We are looking for a talented engineer to join our
AMS Verification team
and contribute to the functional verification of
advanced mixed-signal ASICs
for applications including
PMICs,
wireless charging, battery charging, display drivers
, and other complex integrated solutions.
In this role, you will collaborate closely with
analog, digital, and system-level designers
to develop and validate
high-quality behavioral models
and
System Verilog real-number models
used in
AMS and DMS verification flows
. You will work on models that may be
hierarchical or flat
, as well as
black-box or white-box
, depending on the verification needs and project phase.
You will be responsible for:
Preparing and configuring
mixed-signal simulation environments
based on technical documentation
Executing simulations and analyzing results with rigor and attention to detail
Validating outcomes in close cooperation with
analog and digital design teams
Producing clear, structured
technical documentation
to present results, assumptions, and conclusions




Contributing to the continuous evolution of verification methodologies and simulation flows in an
R&D; environment
Desired profiles
Master's degree
in Electrical, Electronic, or Computer Engineering
Strong ability to understand the
architecture and behavior of complex electronic systems
Solid programming skills and an analytical mindset
Strong collaboration skills and a proactive attitude
Experience with
System Verilog real-number modeling
is highly valued
Familiarity with
mixed-signal simulation platforms
such as:
Mentor Questa/ADMS
Cadence Xcelium/AMS
Synopsys VCS/AMS
Knowledge of
VHDL, Verilog, Verilog-AMS, or System Verilog
is a plus
This role is ideal for someone who thrives in a
technical, high-impact environment
and is motivated by the opportunity to shape the verification of next-generation mixed-signal products.
The expected salary range for this position is €****** - €****** gross annual salary (RAL), plus variable pay relevant for the role.
In accordance with the EU Pay Transparency Directive and applicable Italian legislation, this compensation range has been determined based on objective, gender-neutral criteria, including job responsibilities, required skills, relevant experience, qualifications, and market benchmarks. Placement within the range will depend on the candidate's profile and demonstrated competencies. The final offer will be made in compliance with the applicable National Collective Bargaining Agreement (CCNL), where relevant, and our internal compensation policies. We are committed to equal pay for equal work and equal opportunities for all candidates.
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