22 set - Bardi
Altro
ams Italy S.r.l. is seeking a Technical Leader to own architecture and RTL development for high-speed digital subsystems in communication ICs and mixed-signal SoCs. You will define digital architectures and drive RTL initiatives across teams, ensuring robust design and timely integration.
The role requires a MSc/PhD in EE, 10+ years of experience in digital IC design, expert RTL with Verilog/SystemVerilog, and strong knowledge of high-speed interfaces and CDC. FinFET/FD-SOI experience is valued.
25 set - Roma
DAVID NAMAN
25 set - Udine
OLTRE I CONFINI 2.0
25 set - Friuli-Venezia Giulia
Arethusa
25 set - Pescara
Alll