24 set - Milano
Onsemi
onsemi is looking for a Principal Verification Engineer in Milano, Italy. The role requires strong expertise in SystemVerilog and UVM, with a focus on both block-level and SoC-level verification of integrated circuits.
Ideal candidates will have 7–10+ years of experience and a solid understanding of verification methodologies. Responsibilities include developing verification plans, maintaining verification environments, and collaborating with cross-functional teams to ensure optimal verification processes.
25 set - Roma
DAVID NAMAN
25 set - Udine
OLTRE I CONFINI 2.0
25 set - Friuli-Venezia Giulia
Arethusa
25 set - Pescara
Alll