26 set - Catania
Nokia
Nokia in Italy seeks a SoC Physical Design Engineer in Catania to advance PD for Optical Network ASICs across 3/5/7nm nodes. You will floorplan, place and route, and manage power/clock distribution, while driving RTL-to-GDSII flows.
You will verify timing at block and chip level, collaborate with logic designers, and develop PD methodologies with automation scripts for Synthesis to GDSII. Hybrid work available.
#J-18808-Ljbffr
27 set - Genova
MedTug
27 set - Verona
Oniverse
27 set - Roma
BIP
27 set - Bologna
TAGLIABENE