Hardware Memory Expert
Pubblicato il 27-09-2026 - Marelli in Corbetta
About the Position
La preghiamo di leggere attentamente le informazioni contenute in questo annuncio di lavoro per comprendere esattamente cosa ci si aspetta dai potenziali candidati.
We are looking for a Hardware Memory Expert to join the Electronics Business team. The Hardware Memory Expert is part of the HW System Architecture Team (HWSA) and reports directly to the HWSA leader. This position is based at our office in Corbetta (MI).
He/she follows memory technology trends that could be part of a Cockpit, Body Computer, Telematics Units, Zone Control Unit or Cluster ECU, and is responsible for defining memory requirements considering MCU and SOC architectures, physical designs, firmware and verification requirements coordinated by the System Architect Leader.
He/she contributes to the early definition of the product during the Offer Phase to enable proper evaluation of the memory perimeter and related cost. During product development, he/she leads the development team (HW, BSP, Manufacturing, Purchasing) to define the impact of the memory choice in terms of calibration, production time,
dual source for component replacement and in general all tasks impacted by the HW memory choice.
Responsibilities
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- Define the Memory Architecture by analyzing available memory technologies, memory size, memory bandwidth and latency.
- Monitor technology trends on HW functionalities also comparing proposals from different technology and vendors.
- Be an expert in Flash, SRAM, DRAM fundamentals and emerging memories (MRAM, RRAM, HBM, 3D‑stacked memories).
- Demonstrate expertise in memory controller, protocols and parameters.
- Know‑how in CPU/GPU memory needs, on‑chip vs. off‑chip memory.
- Experience with efficient programming technologies at production.
- Participate in competitor analysis activity transferring best design practices to internal team.
- Provide governance in the HW design team about different implementation proposals.
- Deploy the relative parts of System F